Mixed lithography approach for e-beam and optical exposure using HSQ

摘要

In one aspect, a method of forming a wiring layer on a wafer is provided which includes: depositing a HSQ layer onto the wafer; cross-linking a first portion(s) of the HSQ layer using e-beam lithography; depositing a hardmask material onto the HSQ layer; patterning the hardmask using optical lithography, wherein the patterned hardmask covers a second portion(s) of the HSQ layer; patterning the HSQ layer using the patterned hardmask in a manner such that i) the first portion(s) of the HSQ layer remain and ii) the second portion(s) of the HSQ layer covered by the patterned hardmask remain, wherein by way of the patterning step trenches are formed in the HSQ layer; and filling the trenches with a conductive material to form the wiring layer on the wafer.

主权项

1. A method of forming a wiring layer on a wafer, the method comprising:
depositing a layer of hydrogen silsesquioxane (HSQ) onto the wafer; cross-linking one or more first portions of the HSQ layer in a first region of the wafer using e-beam lithography; depositing a hardmask material onto the HSQ layer; patterning the hardmask material to form a patterned hardmask on the HSQ layer using optical lithography, wherein the patterned hardmask covers one or more second portions of the HSQ layer in a second region of the wafer; patterning the HSQ layer using the patterned hardmask in a manner such that i) the one or more first portions of the HSQ layer that are cross-linked remain in the first region of the wafer and ii) the one or more second portions of the HSQ layer covered by the patterned hardmask remain in the second region of the wafer, wherein by way of the patterning of the HSQ layer using the patterned hardmask one or more first trenches are formed in the HSQ layer in the first region of the wafer and one or more second trenches are formed in the HSQ layer in the second region of the wafer; and filling the one or more first trenches in the first region of the wafer and the one or more second trenches in the second region of the wafer with a conductive material to form the wiring layer on the wafer.