LDMOS with adaptively biased gate-shield

摘要

An LDFET is disclosed. A source region is electrically coupled to a source contact. A lightly doped drain (LDD) region has a lower dopant concentration than the source region, and is separated from the source region by a channel. A highly doped drain region forms an electrically conductive path between a drain contact and the LDD region. A gate electrode is located above the channel and separated from the channel by a gate dielectric. A shield plate is located above the gate electrode and the LDD region, and is separated from the LDD region, the gate electrode, and the source contact by a dielectric layer. A control circuit applies a variable voltage to the shield plate that: (1) accumulates a top layer of the LDD region before the transistor is switched on; and (2) depletes the top layer of the LDD region before the transistor is switched off.

主权项

1. A lateral diffusion field effect transistor and an associated control circuit comprising:
a source region of doped semiconductor material that is electrically coupled to a metallic source contact; a first doped drain region of doped semiconductor material that has a lower dopant concentration than the source region; a second doped drain region of doped semiconductor material that: (1) forms an electrically conductive path between the metallic drain contact and the first doped drain region; and (2) has a higher dopant concentration than the first doped drain region; a channel that separates the source region and the first doped drain region; a gate electrode located above the channel and separated from the channel by a gate dielectric; and a shield plate located above the gate electrode and the first doped drain region, and separated from the first doped drain region, the gate electrode, and the source contact by an interlayer dielectric; wherein the control circuit includes a delay circuit, is integrated on a monolithic substrate with the lateral diffusion field effect transistor, and:
applies a variable voltage to the shield plate that: (1) pulls majority carriers in the first doped drain region towards the shield plate before the transistor is switched on; and (2) pushes majority carriers in the first doped drain region away from the shield plate before the transistor is switched off;ramps the variable voltage in a first direction from a first voltage to a second voltage;ramps the variable voltage in a second direction from the second voltage to the first voltage;begins ramping the voltage before the transistor is switched on and completes ramping the voltage after the transistor is switched on; andbegins ramping the voltage before the transistor is switched off and completes ramping the voltage after the transistor is switched off.