发明名称 Multi-chip package having a substrate with a plurality of vertically embedded die and a process of forming the same
摘要 An apparatus includes a substrate having a land side having a plurality of contact pads and a die side opposite the land side. The apparatus includes a first die and a second die wherein the first die and second die are embedded within the substrate such that the second die is located between the first die and the land side of the substrate.
申请公布号 US9559088(B2) 申请公布日期 2017.01.31
申请号 US201414279165 申请日期 2014.05.15
申请人 Intel Corporation 发明人 Gonzalez Javier Soto;Jomaa Houssam
分类号 H01L25/00;H01L23/538;H01L23/00;H01L23/498;H01L21/56 主分类号 H01L25/00
代理机构 Blakely, Sokoloff, Taylor & Zafman LLP 代理人 Blakely, Sokoloff, Taylor & Zafman LLP
主权项 1. A method of forming a multi-chip package comprising: attaching a first die to a carrier, wherein the first die is positioned in a cavity formed in the carrier; forming a first insulating layer over said first die and said carrier such that said first die is embedded within said first insulating layer; placing a second die above said first insulating layer; forming a second insulating layer over said second die so that said second die is embedded within said second insulating layer; and separating the carrier from the first insulating layer so that no portion of the carrier remains in contact with the first insulating layer.
地址 Santa Clara CA US
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