发明名称 Blister-free polycrystalline silicon for solar cells
摘要 Described herein are methods of fabricating solar cells. In an example, a method of fabricating a solar cell includes forming an amorphous dielectric layer on the back surface of a substrate opposite a light-receiving surface of the substrate. The method also includes forming a microcrystalline silicon layer on the amorphous dielectric layer by plasma enhanced chemical vapor deposition (PECVD). The method also includes forming an amorphous silicon layer on the microcrystalline silicon layer by PECVD. The method also includes annealing the microcrystalline silicon layer and the amorphous silicon layer to form a homogeneous polycrystalline silicon layer from the microcrystalline silicon layer and the amorphous silicon layer. The method also includes forming an emitter region from the homogeneous polycrystalline silicon layer.
申请公布号 US9559245(B2) 申请公布日期 2017.01.31
申请号 US201514747874 申请日期 2015.06.23
申请人 SunPower Corporation;Total Marketing Services 发明人 Qiu Taiqing;Poulain Gilles Olav Tanguy Sylvain;Jaffrennou Périne;Habka Nada;Filonovich Sergej
分类号 H01L31/18 主分类号 H01L31/18
代理机构 Blakely Sokoloff Taylor Zafman LLP 代理人 Blakely Sokoloff Taylor Zafman LLP
主权项 1. A method of fabricating a solar cell with differentiated P-type and N-type architectures, the method comprising: forming a first microcrystalline silicon layer on a first thin dielectric layer formed on a back surface of a substrate, the first microcrystalline silicon layer formed by plasma enhanced chemical vapor deposition (PECVD); forming a P-type amorphous silicon layer on the first microcrystalline silicon layer by PECVD; forming an insulating layer on the P-type amorphous silicon layer; patterning the insulating layer and the P-type amorphous silicon layer to form P-type amorphous silicon regions having an insulating cap thereon with trenches in the substrate separating the P-type amorphous silicon regions; forming a second thin dielectric layer on exposed sides of the P-type amorphous silicon regions and in the trenches; forming a second microcrystalline silicon layer on the second thin dielectric layer by PECVD; forming an N-type amorphous silicon layer on the second microcrystalline silicon layer by PECVD; annealing the first microcrystalline silicon layer and the P-type amorphous silicon regions to form P-type homogeneous polycrystalline silicon regions and annealing the second microcrystalline silicon layer and the N-type amorphous silicon layer to form an N-type homogeneous polycrystalline silicon layer; and forming conductive contacts to the P-type homogeneous polycrystalline silicon regions and to the N-type homogeneous polycrystalline silicon layer.
地址 San Jose CA US