发明名称 Multiprocessor system with performance control based on input and output data rates
摘要 A multi-processor system with dynamic power optimization for an integrated circuit and methods thereof are described. An input rate control signal is generated responsive to at least one input data stream. An output rate control signal is generated responsive to an output of the plurality of processors. The input rate control signal and the output rate control signal are monitored. The at least one input data stream is partitioned in response to the input rate control signal. The partitioned data is distributed to at least a portion of the plurality of processors. The plurality of processors is operated in a plurality of modes responsive to the monitoring.
申请公布号 US9557795(B1) 申请公布日期 2017.01.31
申请号 US200912565138 申请日期 2009.09.23
申请人 XILINX, INC. 发明人 Sabih Sabih;Mohan Sundararajarao
分类号 G06F1/32;G06F9/38;G06F9/50 主分类号 G06F1/32
代理机构 代理人 Webostad W. Eric;Maunu LeRoy D.
主权项 1. A method of operating an integrated circuit having a plurality of processors, the method comprising: storing an input data stream received from a plurality of serial interfaces in a buffer memory, and converting the input data stream from a serial format to a parallel format; determining an input data rate that is a collective data rate of the input data stream received from the plurality of serial interfaces and stored in the buffer memory; generating an input rate control signal responsive to the serial format input data stream, the input rate control signal indicative of the input data rate; determining an output data rate indicative of an outgoing data rate of the parallel format input data stream between the buffer memory and at least a portion of the plurality of processors; generating an output rate control signal responsive to and indicative of the output data rate; determining an average input data rate from the input rate control signal; determining an average output data rate from the output rate control signal; determining a current performance level as a function of the average input data rate and the average output data rate; partitioning the parallel format input data stream in response to the current performance level; distributing the partitioned parallel format input data stream to the portion of the plurality of processors; and operating the plurality of processors in a plurality of modes responsive to the current performance level.
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