发明名称 A/D converter including multiple sub-A/D converters
摘要 An A/D converter includes: an input buffer; N sub-A/D converters including N first sampling circuits that are connected to the input buffer, and that sample the output analog signal in respective sampling slots; a control circuit that executes calibration for the N first sampling circuits one by one; a reference A/D converter including a second sampling circuit that is connected to the input buffer, and that samples the output analog signal in the same sampling slot as the sampling slot of one first sampling circuit under execution of the calibration among the N first sampling circuits; and a third sampling circuit that is connected to the input buffer, and that samples the output analog signal in the same sampling slots as the sampling slots of the (N−1) first sampling circuits out of the execution of the calibration.
申请公布号 US9559711(B2) 申请公布日期 2017.01.31
申请号 US201615131969 申请日期 2016.04.18
申请人 Panasonic Intellectual Property Management Co., Ltd. 发明人 Ozeki Toshiaki;Naka Junichi;Miki Takuji
分类号 H03M1/10;H03M1/12;H03M1/38 主分类号 H03M1/10
代理机构 McDermott Will & Emery LLP 代理人 McDermott Will & Emery LLP
主权项 1. An A/D converter comprising: an input buffer that receives an analog signal and outputs an output analog signal; N (an integer of two or more) sub-A/D converters including N first sampling circuits that are connected to an output side of the input buffer, and that sample the output analog signal in respective sampling slots different from each other; a control circuit that executes calibration for the N first sampling circuits one by one; a reference A/D converter including a second sampling circuit that is connected to the output side of the input buffer, and that samples the output analog signal in the same sampling slot as the sampling slot of one first sampling circuit under execution of the calibration among the N first sampling circuits; and a third sampling circuit that is connected to the output side of the input buffer, and that samples the output analog signal in the same sampling slots as the sampling slots of the (N−1) first sampling circuits out of the execution of the calibration.
地址 Osaka JP