发明名称 VCOM with reduced supply rails
摘要 A VCOM generator circuit generates a VCOM signal for an electronic display. The VCOM circuit includes an operational amplifier having reduced supply rails. In an implementation, the VCOM circuit has at least three supply rails, AVDD, ground or GND, and VP or VN, or both. VP is less than AVDD and greater than VN. VN is higher than ground and below VP. The VCOM circuit with reduced voltage supply rails for VP and VN reduces power consumption of the VCOM op amps. By reducing power consumption, this also reduces the surface temperature of the integrated circuit.
申请公布号 US9558707(B1) 申请公布日期 2017.01.31
申请号 US201414252721 申请日期 2014.04.14
申请人 IML International 发明人 Viviani Alberto Giovanni;Goder Dimitry;Lee JunGi;Kao ChinFa;Lu Chun
分类号 G09G3/36;G06F3/041 主分类号 G09G3/36
代理机构 Aka Chan LLP 代理人 Aka Chan LLP
主权项 1. A method comprising: providing a voltage generator circuit comprising a reference voltage output node for coupling to a common voltage signal input of a display panel; coupling the reference voltage output node of the voltage generator circuit between an AVDD supply and ground supply; coupling a V1 supply to the reference voltage output node, wherein the V1 supply is at a fixed voltage level between the AVDD and the ground supplies; when a voltage level at the reference voltage output node is above a V1 voltage level of the V1 supply, supplying output current from the AVDD supplies to the reference voltage output node; coupling a V2 supply to the reference voltage output node, wherein the V2 supply is at a fixed voltage level between the AVDD and the ground supplies, and a V2 voltage level of the V2 supply is below the V1 voltage level; when a voltage level at the reference voltage output node is below the V2 voltage level, supplying current from the ground supply to the reference voltage output node; and when a voltage level at the reference voltage output node is above the V2 voltage level and below the V1 voltage level, supplying current from at least one of the V1 or V2 supplies to the reference voltage output node, and not supplying output current from the AVDD supply to the reference voltage output node.
地址 Grand Cayman KY