主权项 |
1. A test structure for use in manufacturing a semiconductor device, comprising:
a substrate; two or more test cells formed on the substrate or formed in a layer of material on a surface of the substrate, wherein each of said two or more test cells includes a plurality of test patterns formed on the substrate or formed on a layer of material formed thereon, wherein the two or more test cells include at least four cells, at least two of which have grating patterns that are oriented in a first direction and at least two others of which have grating patterns that are oriented in a second direction perpendicular to the first direction, wherein each of the at least two cells having grating patterns that are oriented in the first direction is positioned next to one of the at least two cells having grating patterns that are oriented in the second direction, wherein the test cells are configured for metrology measurements associated with two or more lithography steps performed on the substrate or one or more layers of material formed thereon, wherein for at least one lithography step at least two of said two or more test cells are patterned with the same test pattern, wherein for at least one other lithography step only one of said two or more test cells is patterned and another of said two or more test cells is left unpatterned, wherein test patterns in each of said two or more test cells are configured to facilitate feed forward and feed sideways of metrology information. |