发明名称 |
Three-dimensional semiconductor architecture |
摘要 |
A system and method for making semiconductor die connections with through-substrate vias are disclosed. Through substrate vias are formed through the substrate to allow for signal connections as well as power and ground connections. In one embodiment the substrate has an interior region and a periphery region surrounding the interior region. A first set of through substrate vias are located within the periphery region, and a second set of through substrate vias are located within the interior region, wherein the second set of through substrate vias are part of a power matrix. The second set of through substrate vias bisect the substrate into a first part and a second part. |
申请公布号 |
US9559003(B2) |
申请公布日期 |
2017.01.31 |
申请号 |
US201514827749 |
申请日期 |
2015.08.17 |
申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Law Oscar M. K.;Wu Kuo H. |
分类号 |
H01L21/768;H01L23/00;H01L23/48;H01L23/525;H01L23/528;H01L25/065;H01L23/498;H01L21/822;H01L27/06;H01L27/12 |
主分类号 |
H01L21/768 |
代理机构 |
Slater Matsil, LLP |
代理人 |
Slater Matsil, LLP |
主权项 |
1. A method of manufacturing a semiconductor device, the method comprising:
forming first active devices at least partially within a first surface of a substrate, wherein the substrate comprises a second surface, an interior region, and a periphery region surrounding the interior region; forming a first set of through substrate vias within the periphery region and extending from the first surface of the substrate to the second surface of the substrate; and forming a second set of through substrate vias within the interior region and extending from the first surface of the substrate to the second surface of the substrate, wherein the second set of through substrate vias are part of a power matrix, the second set of through substrate vias bisecting the substrate into a first part and a second part. |
地址 |
Hsin-Chu TW |