TRAPPING GATE FORMING PROCESS AND FLASH CELL

摘要

A trapping gate forming process includes the following. An oxide/nitride/oxide layer is formed on a substrate. A hard mask is formed to cover the oxide/nitride/oxide layer. The hard mask, the oxide/nitride/oxide layer and the substrate are patterned to form at least a trench in the hard mask, the oxide/nitride/oxide layer along a first direction. An isolation structure is formed in the trench. A first gate is formed across the oxide/nitride/oxide layer along a second direction orthogonal to the first direction. A flash cell formed by said process includes a substrate, a first gate and an oxide/nitride/oxide layer. The substrate contains at least an active area extending along a first direction. The first gate is disposed across the active area along a second direction orthogonal to the first direction, thereby intersecting an overlapping area. The oxide/nitride/oxide layer is disposed in the overlapping area between the first gate and the active area.

主权项

1. A trapping gate forming process, comprising:
forming an oxide/nitride/oxide layer on a substrate, the substrate comprising a flash cell area and a logic area; forming a hard mask covering the oxide/nitride/oxide layer; patterning the hard mask, the oxide/nitride/oxide layer and the substrate to form at least a trench in the hard mask, the oxide/nitride/oxide layer along a first direction; forming an isolation structure in the trench; forming a first gate across the oxide/nitride/oxide layer along a second direction orthogonal to the first direction; before the first gate is formed, forming a gate dielectric layer only on the logic area of the substrate; and forming a second gate on the gate dielectric layer while the first gate on the oxide/nitride/oxide layer is being formed, so that a control gate is formed in the flash cell area while a selective gate is formed in the logic area.