发明名称 CIRCUIT SUBSTRATE, SEMICONDUCTOR PACKAGE AND PROCESS FOR FABRICATING THE SAME
摘要 A circuit substrate has the following elements. A stacked circuit structure has a first surface and a second surface opposite thereto surface. A first patterned inner conductive layer is disposed on the first surface and has multiple pads. A first patterned outer conductive layer is disposed on the patterned inner conductive layer and has multiple conductive pillars, wherein each of the first conductive pillar is located on the corresponding first pad. The first dielectric layer covers the first surface, the first patterned inner conductive layer and the first patterned outer conductive layer, and has multiple first concaves, wherein the first concave exposes the top and side of the corresponding first conductive pillar. A semiconductor package structure applied the above circuit substrate and a process for fabricating the same are also provided here.
申请公布号 US2017025343(A1) 申请公布日期 2017.01.26
申请号 US201615284514 申请日期 2016.10.03
申请人 VIA Technologies, Inc. 发明人 Kung Chen-Yueh
分类号 H01L23/498;H01L21/56;H01L23/367;H01L21/48;H01L23/00;H01L23/31 主分类号 H01L23/498
代理机构 代理人
主权项 1. A circuit substrate, comprising: a stacked circuit structure having a first surface and a second surface opposite to the first surface; a first patterned inner conductive layer disposed on the first surface and having a plurality of first pads; a first patterned outer conductive layer disposed on the first patterned inner conductive layer and having a plurality of first conductive pillars, wherein each of the first conductive pillars is located on the corresponding first pad; a first dielectric layer covering the first surface, the first patterned inner conductive layer and the first patterned outer conductive layer and having a plurality of first concaves, wherein each of the first concaves exposes a top and a side of the corresponding first conductive pillar, and the top and the side of the first conductive pillar are exposed for directly soldering a chip; a second patterned inner conductive layer disposed on the second surface and having a plurality of second pads; a second patterned outer conductive layer disposed on the second patterned inner conductive layer and having a plurality of second conductive pillars, wherein each of the second conductive pillars is located on the corresponding second pad; and a second dielectric layer covering the second surface, the second patterned inner conductive layer and the second patterned outer conductive layer and having a plurality of second concaves, wherein each of the second concaves exposes a top and a side of the corresponding second conductive pillar; wherein an outer diameter of each of the second conductive pillars is smaller than an outer diameter of the corresponding second pad, and the corresponding second concave exposes a portion of the corresponding second pad.
地址 New Taipei City TW