发明名称 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
摘要 A semiconductor memory device according to an embodiment comprises a stacked body, a semiconductor layer, a charge accumulation layer, and a slit portion. The stacked body includes a plurality of control gate electrodes stacked above a substrate. The semiconductor layer has one end thereof connected to the substrate, and faces the plurality of control gate electrodes. The charge accumulation layer is positioned between the control gate electrode and the semiconductor layer. The slit portion extends in a direction of the substrate from a surface of the stacked body, wherein the slit portion has its longitudinal direction in a direction intersecting the first direction.
申请公布号 US2017025434(A1) 申请公布日期 2017.01.26
申请号 US201614991084 申请日期 2016.01.08
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NAKAJIMA Kazuaki;OMOTO Seiichi;TOYODA Hiroshi
分类号 H01L27/115;H01L21/28;H01L21/311;H01L29/792;H01L29/66 主分类号 H01L27/115
代理机构 代理人
主权项 1: A semiconductor memory device, comprising: a plurality of stacked bodies including a plurality of control gate electrodes stacked above a substrate, the plurality of stacked bodies having their longitudinal direction in a first direction parallel to the substrate and being arranged in a second direction intersecting the first direction; a semiconductor layer having one end thereof connected to the substrate, the semiconductor layer facing the plurality of control gate electrodes; a charge accumulation layer positioned between the control gate electrode and the semiconductor layer; and a slit portion extending in a direction of the substrate from a surface of the stacked body, wherein the slit portion has its longitudinal direction in a direction intersecting the first direction.
地址 Minato-ku JP