发明名称 CONCURRENTLY READING FIRST AND SECOND PAGES OF MEMORY CELLS HAVING DIFFERENT PAGE ADDRESSES
摘要 In an embodiment, a first page of memory cells in a first memory plane is read concurrently with a second page of memory cells in a second memory plane. The second memory plane is different than the first memory plane, but is in the same memory array as the first memory plane. The second page of memory cells has a different page address than the first page of memory cells.
申请公布号 US2017025181(A1) 申请公布日期 2017.01.26
申请号 US201615288010 申请日期 2016.10.07
申请人 MICRON TECHNOLOGY, INC. 发明人 Moschiano Violante;Cichocki Mattia;Vali Tommaso;Gallese Maria-Luisa;Siciliani Umberto
分类号 G11C16/26 主分类号 G11C16/26
代理机构 代理人
主权项 1. A method of operating a memory device, comprising: using a first digital-to-analog converter to respectively generate one or more first analog read voltages from one or more first digital values successively received at the first digital-to-analog converter; successively applying the one or more first analog read voltages, as the one or more first analog read voltages are generated, to a first page of memory cells in a first memory plane; using a second digital-to-analog converter to respectively generate one or more second analog read voltages from one or more second digital values successively received at the second digital-to-analog converter; successively applying the one or more second analog read voltages, as the one or more second analog read voltages are generated, to a second page of memory cells in a second memory plane; selecting one of a plurality of first conversion tables dedicated to a first portion of a page buffer for output and selecting one of a plurality of second conversion tables dedicated to a second portion of the page buffer for output; outputting a first code to the first portion of the page buffer from a location in the selected first conversion table that is identified by a particular first digital data value of the one or more first digital values in response to a first memory cell of the first page of memory cells conducting in response to a particular first analog read voltage of the one or more first analog read voltages that is generated from the particular first digital data value; and outputting a second code to the second portion of the page buffer from a location in the selected second conversion table that is identified by a particular second digital data value of the one or more second digital values in response to a second memory cell of the second page of memory cells conducting in response to a particular second analog read voltage of the one or more second analog read voltages that is generated from the particular second digital data value; wherein the first page of memory cells in the first memory plane and the second page of memory cells in the second memory plane have different page addresses; and wherein the first and second codes are output concurrently.
地址 Boise ID US