发明名称 |
Tunable and Integrated Impedance Matching and Filter Circuit |
摘要 |
A high performance integrated tunable impedance matching network with coupled merged inductors. Embodiments include a combination of merged multiport constructively coupled spiral inductors and tunable capacitors configured to reduce insertion losses, circuit size, and optimization time while maintaining a high Q factor for the coupled spiral inductors. Some embodiments integrate one or more filter circuits with a tunable impedance matching network, useful in conjunction with such applications as radio frequency power amplifiers. |
申请公布号 |
US2017026021(A1) |
申请公布日期 |
2017.01.26 |
申请号 |
US201615048744 |
申请日期 |
2016.02.19 |
申请人 |
Peregrine Semiconductor Corporation |
发明人 |
Cheng Chih-Chieh;Ranta Tero Tapio;Whatley Richard Bryon;Sekar Vikram |
分类号 |
H03H7/38;H01L21/70;H01L23/64;H03H7/01;H03H3/00 |
主分类号 |
H03H7/38 |
代理机构 |
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代理人 |
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主权项 |
1. A tunable impedance matching and filtering circuit including:
(a) a coupled merged inductor having at least three ports, at least one such port configured to receive an input signal and at least one other such port configured to output a filtered impedance matched output signal; (b) a plurality of tuning circuits, each electrically connected to a corresponding one of the at least three ports of the coupled merged inductor; and (c) at least one filter circuit, each electrically connected to one or more of the at least three ports of the coupled merged inductor. |
地址 |
San Diego CA US |