发明名称 PARALLEL REDUNDANT CHIPLET SYSTEM
摘要 A parallel redundant integrated-circuit system includes an input connection, an output connection and first and second active circuits. The first active circuit includes one or more first integrated circuits and has an input connected to the input connection and an output connected to the output connection. The second active circuit includes one or more second integrated circuits and is redundant to the first active circuit, has an input connected to the input connection, and has an output connected to the output connection. The second integrated circuits are separate and distinct from the first integrated circuits.
申请公布号 US2017025075(A1) 申请公布日期 2017.01.26
申请号 US201514807226 申请日期 2015.07.23
申请人 X-Celeprint Limited 发明人 Cok Ronald S.;Rotzoll Robert R.;Bower Christopher;Meitl Matthew
分类号 G09G3/34;G09G3/32;G09G3/20;H05B33/08 主分类号 G09G3/34
代理机构 代理人
主权项 1. A parallel redundant integrated-circuit system, comprising: a common input connection; a common output connection; a first active circuit comprising one or more first integrated circuits, the first active circuit having an input connected to the common input connection and an output connected to the common output connection; and a second active circuit comprising one or more second integrated circuits, the second active circuit redundant to the first active circuit and having an input connected to the common input connection and an output connected to the common output connection, wherein the one or more second integrated circuits are separate and distinct from the one or more first integrated circuits.
地址 Cork IE