发明名称 半導体装置
摘要 A content addressable memory has many elements in one memory cell; thus, the area of one memory cell tends to be large. In view of the above, it is an object of an embodiment of the present invention to reduce the area of one memory cell. Charge can be held with the use of a channel capacitance in a reading transistor (capacitance between a gate electrode and a channel formation region). In other words, the reading transistor also serves as a charge storage transistor. One of a source and a drain of a charge supply transistor is electrically connected to a gate of the reading and charge storage transistor.
申请公布号 JP6068829(B2) 申请公布日期 2017.01.25
申请号 JP20120108657 申请日期 2012.05.10
申请人 株式会社半導体エネルギー研究所 发明人 松林 大介
分类号 G11C15/04;H01L21/8242;H01L27/108;H01L29/786 主分类号 G11C15/04
代理机构 代理人
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