发明名称 メモリシステムおよびメモリシステムのアセンブリ方法
摘要 According to one embodiment, each memory chip included in a memory package includes a first storage unit that stores therein first information that is n-bit information and is a comparison target of a chip address, and is used for identifying its own memory chip, a second storage unit that stores therein second information for determining an effective bit of the n-bit first information, and a control unit that determines an effective bit of the n-bit first information and an effective bit of the chip address based on the second information.
申请公布号 JP6067541(B2) 申请公布日期 2017.01.25
申请号 JP20130232541 申请日期 2013.11.08
申请人 株式会社東芝 发明人 竹山 嘉和;長井 裕士
分类号 G06F12/06 主分类号 G06F12/06
代理机构 代理人
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