| 主权项 |
1. A method for verifying an integrity of a coherent shared memory using inline coding, the coherent shared memory comprising a plurality of memory units, the plurality of memory units being accessed by a plurality of bus masters, the method comprising:
performing an active stage step, wherein the active stage step comprises:
writing, by each of the plurality of bus masters, a corresponding data from a cache memory of each bus master to at least one memory unit from the plurality of memory units, wherein each bus master includes a separate cache memory;updating, within a status database, a status corresponding to the at least one memory unit to a modified state; in response to performing the active stage step, performing a rewriting stage step comprising rewriting contents of the corresponding data from each cache memory of each of the plurality of bus masters to the at least one memory unit of the plurality of memory units; and in response to performing the rewriting stage step, performing a verification stage step, wherein the verification stage step comprises:
each of the plurality of bus masters reading back data written by each of the plurality of bus masters, from the at least one memory unit;comparing the data read back by each of the plurality of bus masters, with an expected data written in the at least one memory unit, wherein the expected data written is substantially similar to the corresponding data, and wherein the expected data is data which has been written by the plurality of bus masters during the active step; andupdating and/or maintaining the status corresponding to the at least one memory unit in the status database to at least one of:
a verified state, on the event of a match being found between the data read back and the expected data written, by at least one of the plurality of bus masters; andthe modified state, on the event of a mismatch between the data read back and the expected data written by at least one of the plurality of bus masters. |
