Constrained boot techniques in multi-core platforms

摘要

Methods and apparatus relating to constrained boot techniques in multi-core platforms are described. In one embodiment, a processor may include logic that controls which specific core(s) are to be powered up/down and/or which power state these core(s) need to enter based, at least in part, on input from OS and/or software application(s). Other embodiments are also claimed and disclosed.

主权项

1. A processor comprising:
a plurality of processor cores; and control logic, coupled to a first processor core and a second processor core of the plurality of processor cores, to detect a wake event from a low power consumption state and to cause the second processor core of the plurality of processor cores to enter a reduced power consumption state that consumes less power than a fully operational power consumption state, wherein, in response to the wake event, the control logic is to cause the first processor core to enter the fully operational power consumption state, wherein the control logic is to cause any remaining processor cores from the plurality of the processor cores, including the second processor core, to enter the reduced power consumption state based on a source of the wake event, wherein the first processor core is a bootstrap processor core and the second processor core is a non-bootstrap processor core.