Semiconductor arrangement with capacitor

摘要

A semiconductor arrangement includes a logic region and a memory region. The memory region has an active region that includes a semiconductor device. The memory region also has a capacitor within one or more dielectric layers over the active region. The semiconductor arrangement includes a protective ring within at least one of the logic region or the memory region and that separates the logic region from the memory region. The capacitor has a first electrode, a second electrode and an insulating layer between the first electrode and the second electrode, where an electrode unit of the first electrode has a first portion and a second portion, and where the second portion is above the first portion and is wider than the first portion.

主权项

1. A semiconductor arrangement comprising:
an active region comprising a semiconductor device; and a capacitor comprising:
a first electrode over a metal contact formed in a dielectric layer over the active region, the metal contact providing an electrical connection through the dielectric layer to the semiconductor device, the first electrode comprising a first electrode unit comprising:
a first metal structure; anda first electrode layer in contact with the first metal structure;a second electrode; andan insulating layer between the first electrode and the second electrode, wherein:
the first electrode unit is defined by a first portion having a first width and a second portion above the first portion and having a second width greater than the first width,the first portion of the first electrode unit comprises a first portion of the first metal structure and a first portion of the first electrode layer, andthe first portion of the first metal structure is in direct, physical contact with at least two sidewalls of the first portion of the first electrode layer.