Integrated circuit having a vertical power MOS transistor

摘要

A method includes forming a buried layer in a substrate, growing an epitaxial layer over the substrate, etching the epitaxial layer and the buried layer to form a first trench and a second trench, wherein the first trench and the second trench are of a same depth and a width of the second trench is greater than a width of the first trench, forming a dielectric layer in a bottom portion of the first trench, forming a first gate electrode in an upper portion of the first trench and filling the second trench with a gate electrode material, forming gate electrodes for a plurality of lateral transistors formed in the substrate, forming a body region, forming a first drain/source region over the body region and forming a second drain/source region over the epitaxial layer.

主权项

1. A method comprising:
forming a buried layer having a first conductivity in a substrate having a second conductivity; growing an epitaxial layer over the substrate; etching the epitaxial layer and the buried layer to form a first trench and a second trench, wherein a width of the second trench is greater than a width of the first trench; forming a dielectric layer in a bottom portion of the first trench; forming a first gate electrode in an upper portion of the first trench and filling the second trench with a gate electrode material; forming gate electrodes for a plurality of lateral transistors formed in the substrate; implanting ions having the second conductivity into the epitaxial layer on a first side of the first trench to form a body region; forming a first drain/source region over the body region on the first side of the first trench; and forming a second drain/source region over the epitaxial layer on a second side of the first trench.