发明名称 Method of integration of a magnetoresistive structure
摘要 A conductive via disposed beneath a magnetic device and aligned therewith. In certain embodiments, an electrode formed on the conductive via may be polished to eliminate step functions or seams originating at the conductive via from propagating up through the various deposited layers. This integration approach allows for improved scaling of the MRAM devices to, for example, a 45 nanometer node.
申请公布号 US9553260(B2) 申请公布日期 2017.01.24
申请号 US201514704915 申请日期 2015.05.05
申请人 Everspin Technologies, Inc. 发明人 Nagel Kerry Joseph;Smith Kenneth;Hossain Moazzem;Aggarwal Sanjeev
分类号 H01L43/02;H01L43/08;H01L43/12;H01L27/22;H01L21/768;H01L21/3213;H01L21/285 主分类号 H01L43/02
代理机构 代理人
主权项 1. A method of manufacturing one or more interconnects to a magnetoresistive structure, the method comprising: depositing a first conductive material (i) in a via which is formed through a first surface of a first dielectric layer and (ii) on a portion of the first surface of the first dielectric layer; etching the first conductive material wherein, after etching, a portion of the first conductive material remains (i) in the via (ii) and on the first surface of the first dielectric layer; depositing a second conductive material in the via and on the first conductive material remaining in the via; depositing a first electrode material on the second conductive material which is in the via; polishing a first surface of the first electrode material wherein, after polishing, the first electrode material is (i) on the second conductive material which is in the via, (ii) over the first conductive material which is in the via, and (iii) over the portion of the first surface of the first dielectric layer; and forming a magnetoresistive structure on the first electrode material.
地址 Chandler AZ US