Process for improving critical dimension uniformity of integrated circuit arrays

摘要

Methods for patterning integrated circuit (IC) device arrays employing an additional mask process for improving center-to-edge CD uniformity are disclosed. In one embodiment, a repeating pattern of features is formed in a masking layer over a first region of a substrate. Then, a blocking mask is applied over the features in the masking layer. The blocking mask is configured to differentiate array regions of the first region from peripheral regions of the first region. Subsequently, the pattern of features in the array regions is transferred into the substrate. In the embodiment, an etchant can be uniformly introduced to the masking layer because there is no distinction of center/edge in the masking layer. Thus, CD uniformity can be achieved in arrays which are later defined.

主权项

1. An intermediate structure of an integrated circuit, comprising:
a substrate comprising a target layer on the substrate and a hard mask layer on the substrate over the target layer, the substrate comprising a repeating pattern of lines and spaces there-between on the substrate over the hard mask layer; and a mask on the substrate over the repeating pattern of lines and spaces there-between and over the hard mask layer, the mask comprising a plurality of spaced-apart array regions having a peripheral region between immediately laterally-adjacent of the spaced-apart array regions, the repeating pattern of the lines and the spaces there-between spanning across the immediately laterally-adjacent spaced-apart array regions and across the peripheral region that is between the immediately laterally-adjacent spaced-apart array regions.