Configuring programmable integrated circuit device resources as processing elements

摘要

A programmable integrated circuit device includes a plurality of clusters of programmable logic resources. Programmable device interconnect resources allow user-defined interconnection between the clusters of programmable logic resources. A plurality of specialized processing blocks have dedicated arithmetic operators and programmable internal interconnect resources, and having inputs and outputs programmably connectable to the programmable device interconnect resources. A plurality of dedicated memory modules have inputs and outputs programmably connectable to the programmable device interconnect resources. Programmably connectable direct interconnect between at least one respective individual one of the specialized processing blocks and at least one respective individual one of the dedicated memory modules allow the formation of a processor element from a specialized processing block and a memory module. The specialized processing block may be designed with a datapath and operators arranged to support the configuring of a processor element.

主权项

1. A programmable integrated circuit device comprising:
a plurality of clusters of programmable logic resources; programmable device interconnect resources allowing user-defined interconnection between the clusters of programmable logic resources; a plurality of specialized processing blocks having dedicated arithmetic operators and programmable internal interconnect resources, and having inputs and outputs programmably connectable to the programmable device interconnect resources; a plurality of dedicated memory modules having inputs and outputs programmably connectable to the programmable device interconnect resources; a programmably connectable direct interconnect between at least one specialized processing block of the plurality of specialized processing blocks and at least one dedicated memory module of the plurality of dedicated memory modules; and at least one program instruction decoder programmably connectable to the at least one specialized processing block; wherein when the programmably connectable direct interconnect is turned on:
the at least one specialized processing block and the at least one dedicated memory module collectively function as at least one processing element; andthe at least one program instruction decoder decodes one or more program instructions for execution by the at least on processing element; wherein when the programmably connectable direct interconnect is turned off:
the at least one specialized processing block functions as at least one arithmetic operator; andthe at least one dedicated memory module functions as at least one independent memory.