发明名称 |
Semiconductor device and method for manufacturing the same |
摘要 |
An oxide semiconductor layer is formed, a gate insulating layer is formed over the oxide semiconductor layer, a gate electrode layer is formed to overlap with the oxide semiconductor layer with the gate insulating layer interposed therebetween, a first insulating layer is formed to cover the gate insulating layer and the gate electrode layer, an impurity element is introduced through the insulating layer to form a pair of impurity regions in the oxide semiconductor layer, a second insulating layer is formed over the first insulating layer, the first insulating layer and the second insulating layer are anisotropically etched to form a sidewall insulating layer in contact with a side surface of the gate electrode layer, and a source electrode layer and a drain electrode layer in contact with the pair of impurity regions are formed. |
申请公布号 |
US9553200(B2) |
申请公布日期 |
2017.01.24 |
申请号 |
US201313777119 |
申请日期 |
2013.02.26 |
申请人 |
Semiconductor Energy Laboratory Co., Ltd. |
发明人 |
Isobe Atsuo;Tezuka Sachiaki;Ohno Shinji |
分类号 |
H01L29/78;H01L29/786;H01L29/66 |
主分类号 |
H01L29/78 |
代理机构 |
Fish & Richardson P.C. |
代理人 |
Fish & Richardson P.C. |
主权项 |
1. A method for manufacturing a semiconductor device comprising the steps of:
forming a base insulating film; forming an oxide semiconductor layer over the base insulating film; forming a gate insulating layer over the oxide semiconductor layer; forming a gate electrode layer to overlap with the oxide semiconductor layer with the gate insulating layer interposed therebetween; forming a first insulating layer to cover the gate insulating layer and the gate electrode layer; introducing an impurity element through the first insulating layer to form a pair of impurity regions in the oxide semiconductor layer; forming a second insulating layer over the first insulating layer; etching the first insulating layer and the second insulating layer to form a sidewall insulating layer in contact with a side surface of the gate electrode layer; forming a conductive layer over the oxide semiconductor layer, the sidewall insulating layer, the gate electrode layer, and the base insulating film; etching the conductive layer, wherein an etched conductive layer covers the oxide semiconductor layer, the sidewall insulating layer, and the gate electrode layer; and polishing the etched conductive layer to remove the etched conductive layer that overlaps with the gate electrode layer, thereby forming a source electrode layer and a drain electrode layer. |
地址 |
Atsugi-shi, Kanagawa-ken JP |