发明名称 |
Semiconductor structure and method for manufacturing the same |
摘要 |
A semiconductor structure is provided, which includes a first high-voltage MOS device region having a first well and a first light-doping region in a part of the first well, wherein the conductive type of the first well and the conductive type of the first light-doping region are opposite. The first high-voltage MOS device region also includes a first gate stack on a part of the first well and a part of the first light-doping region, and first heavy-doping regions in the first well and the first light-doping region at two sides of the gate stack, wherein the conductive type of the first heavy-doping region and the conductive type of the first well are the same. The first light-doping region between the first well and the first heavy-doping regions is a channel region of the first high-voltage MOS device region. |
申请公布号 |
US9553091(B1) |
申请公布日期 |
2017.01.24 |
申请号 |
US201514863008 |
申请日期 |
2015.09.23 |
申请人 |
Vanguard International Semiconductor Corporation |
发明人 |
Kumar Manoj;Lee Chia-Hao;Liao Chih-Cherng;Hsu Ching-Yi;Chen Jun-Wei |
分类号 |
H01L29/78;H01L21/336;H01L27/092;H01L21/8238 |
主分类号 |
H01L29/78 |
代理机构 |
Birch, Stewart, Kolasch & Birch, LLP |
代理人 |
Birch, Stewart, Kolasch & Birch, LLP |
主权项 |
1. A semiconductor structure, comprising:
a first high-voltage MOS device region, including: a first well; a first light-doping region disposed in a part of the first well, wherein a conductive type of the first well and a conductive type of the first light-doping region are opposite; a first gate stack on a part of the first well and a part of the first light-doping region; spacers on sidewalls of the first gate stack; and a plurality of first heavy-doping regions in the first well and the first light-doping region at two sides of the first gate stack, wherein a conductive type of the plurality of the first heavy-doping regions and the conductive type of the first well are the same, and each of the plurality of the first heavy-doping regions has an edge aligning to an outer side of the spacers; wherein the first light-doping region between the first well and one of the plurality of the first heavy-doping regions in the first light-doping region is a channel region of the first high-voltage MOS device region, and wherein the first well is disposed in a substrate, the conductive type of the first well and a conductive type of the substrate are the same, and the first high-voltage MOS device region further includes a deep well disposed between the first well and the substrate, and a conductive type of the deep well and the conductive type of the first well are different. |
地址 |
Hsinchu TW |