Low power buffer with dynamic gain control

摘要

The present disclosure provides a detailed description of techniques for implementing a low power buffer with dynamic gain control. More specifically, some embodiments of the present disclosure are directed to a buffer having a gain boost configuration and a current shunt circuit to control the gain of a respective gain boosting transistor of the gain boost configuration. The current shunt circuit and resulting gain are dynamically controlled by a gain control signal such that the buffer gain can be adjusted to within an acceptable range of the target gain for the current operating and device mismatch conditions. In one or more embodiments, the gain boost configuration with dynamic gain control can be deployed in a full differential implementation. Both analog and digital dynamic calibration and control techniques can be used to provide the gain control signals to multiple current shunt circuits and multiple buffers.

主权项

1. A buffer circuit comprising:
a first input node to receive a first input signal; a second input node to receive a second input signal; a first connection node; a first supply node; a first transistor coupled to the first input node, the first supply node, and the first connection node; a second transistor coupled to the second input node and the first connection node; and a first current shunt circuit coupled to the second transistor; a gain control node coupled to the first current shunt circuit to receive a gain control signal; a replica buffer coupled to the gain control node to serve as a proxy for the buffer circuit; wherein the second input signal is a complement of the first input signal, and wherein the first current shunt circuit shunts a first bypass current around the second transistor to adjust a gain of the buffer circuit, and wherein the gain is defined by an output amplitude of a first output signal at the first connection node divided by an input amplitude of the first input signal.