System and method for providing a command buffer in a memory system

摘要

A system for interfacing with a co-processor or input/output device is disclosed. According to one embodiment, the system is configured to receive a command from a host memory controller of a host system and store the command in a command buffer entry. The system determines that the command is complete using a buffer check logic and provides the command to a command buffer. The command buffer comprises a first field that specifies an entry point of the command within the command buffer entry.

主权项

1. A method performed by a co-processing or input/output (CPIO) device controller, the method comprising:
receiving a command from a host memory controller of a host system; storing the command in a command buffer entry; determining that the command is complete using a buffer check logic; providing the command to a command buffer to store the command after the buffer check logic completes a command complete check; and providing the command to a CPIO device via a CPIO bus interface, wherein the command buffer comprises a first field that specifies an entry point of the command within the command buffer entry.