发明名称 Method and system for converting a single-threaded software program into an application-specific supercomputer
摘要 The invention comprises (i) a compilation method for automatically converting a single-threaded software program into an application-specific supercomputer, and (ii) the supercomputer system structure generated as a result of applying this method. The compilation method comprises: (a) Converting an arbitrary code fragment from the application into customized hardware whose execution is functionally equivalent to the software execution of the code fragment; and (b) Generating interfaces on the hardware and software parts of the application, which (i) Perform a software-to-hardware program state transfer at the entries of the code fragment; (ii) Perform a hardware-to-software program state transfer at the exits of the code fragment; and (iii) Maintain memory coherence between the software and hardware memories. If the resulting hardware design is large, it is divided into partitions such that each partition can fit into a single chip. Then, a single union chip is created which can realize any of the partitions.
申请公布号 US2017017476(A1) 申请公布日期 2017.01.19
申请号 US201615257319 申请日期 2016.09.06
申请人 Ebcioglu Kemal;Kultursay Emre 发明人 Ebcioglu Kemal;Kultursay Emre
分类号 G06F9/45;G06F17/50;G06F9/52 主分类号 G06F9/45
代理机构 代理人
主权项 1. A method to create an incomplete butterfly sub-network to be used as a part of a partitioned application-specific supercomputer functionally equivalent to and automatically translated from a single-threaded software program code fragment, where r>=2 is radix of the incomplete butterfly sub-network and is a power of two; and where number of input ports m>=1 of the incomplete butterfly sub-network is not a power of r, and/or number of output ports n>=1 of the incomplete butterfly sub-network is not a power of r; and where the incomplete butterfly sub-network is obtained from a corresponding complete butterfly sub-network consisting of multiplexers, buffers and wires, where number of input ports and number of output ports of the corresponding complete butterfly sub-network are both equal to rd where d is smallest integer that makes rd greater than or equal to maximum of m and n, by: retaining, in the incomplete butterfly sub-network, only multiplexers, buffers and wires of the corresponding complete butterfly sub-network required for routing packets from first m input ports of the corresponding complete butterfly sub-network to first n output ports of the corresponding complete butterfly sub-network, anddeleting any remaining multiplexers, buffers and wires of the corresponding complete butterfly sub-network.
地址 Katonah NY US