发明名称 COHERENT TIMER MANAGEMENT IN A MULTICORE OR MULTITHREADED SYSTEM
摘要 In a processing system, a method includes transmitting a timer expiration notification from a timer management component of a processor to one or more other components of the processor in response to expiration of a timer. The method further includes transmitting, from a component of the processor that requested instantiation of the timer, a timer release confirmation message to the timer management component in response to the timer expiration notification, the timer release confirmation message confirming that the component has released the timer. The method also includes preventing reallocation of a timer identifier (ID) associated with the timer to another timer after the expiration of the timer and until receipt of the timer release confirmation message at the timer management component.
申请公布号 US2017017259(A1) 申请公布日期 2017.01.19
申请号 US201514797286 申请日期 2015.07.13
申请人 Freescale Semiconductor, Inc. 发明人 Bar Ron-Michael;Ginzburg Evgeni;Glickman Eran
分类号 G06F1/10 主分类号 G06F1/10
代理机构 代理人
主权项 1. In a processing system, a method comprising: transmitting a timer expiration notification from a timer management component of a processor to one or more other components of the processor in response to expiration of a timer; transmitting, from a component of the processor that requested instantiation of the timer, a timer release confirmation message to the timer management component in response to the timer expiration notification, the timer release confirmation message confirming that the component has released the timer; and preventing reallocation of a timer identifier (ID) associated with the timer to another timer after the expiration of the timer and until receipt of the timer release confirmation message at the timer management component.
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