发明名称 ALLOCATING FIELD-PROGRAMMABLE GATE ARRAY (FPGA) RESOURCES
摘要 A system for allocating field-programmable gate array (FPGA) resources comprises a plurality of FPGAs operable to implement one or more pipeline circuits, the plurality of FPGAs comprising FPGAs of different processing capacities, and one or more processors operable to access a set of data comprising a plurality of work items to be processed according to a pipeline circuit associated with each of the plurality of work items, determine processing requirements for each of the plurality of work items based at least in part on the pipeline circuit associated with each of the plurality of work items, sort the plurality of work items according to the determined processing requirements, and allocate each of the plurality of work items to one of the plurality of FPGAs, such that no FPGA is allocated a work item with processing requirements that exceed the processing capacity of the FPGA.
申请公布号 US2017017523(A1) 申请公布日期 2017.01.19
申请号 US201514799949 申请日期 2015.07.15
申请人 Bank of America Corporation 发明人 Guccione Steven A.
分类号 G06F9/50;G06F9/48 主分类号 G06F9/50
代理机构 代理人
主权项 1. A system for allocating field-programmable gate array (FPGA) resources, comprising: a plurality of FPGAs operable to implement one or more pipeline circuits, the plurality of FPGAs comprising FPGAs of different processing capacities; and one or more processors operable to: access a set of data comprising a plurality of work items to be processed, wherein each of the plurality of work items is associated with a pipeline circuit;determine processing requirements for each of the plurality of work items based at least in part on the pipeline circuit associated with each of the plurality of work items;sort the plurality of work items according to the determined processing requirements;determine available FPGAs from the plurality of FPGAs;determine processing capacities for each of the available FPGAs; andallocate each of the plurality of work items to one of the available FPGAs based on the processing capacities of the available FPGAs, wherein no FPGA is allocated a work item with processing requirements that exceed the processing capacity of the FPGA.
地址 Charlotte NC US