| 摘要 |
A thin film transistor array substrate comprises a bottom gate disposed on a substrate and a bottom gate insulating layer covering the bottom gate, a semiconductor oxide layer disposed on the bottom gate insulating layer and an etch blocking layer covering the semiconductor oxide layer and including a first via, a drain disposed on the etch blocking layer contacting with the semiconductor oxide layer through the first via and an insulating protection layer covering the drain, a second via arranged in the insulating protection layer, the etch blocking layer and the bottom gate insulating layer, a top gate disposed on insulating protection layer contacting with the bottom gate through the second via. The disclosure further discloses a method for manufacturing a thin film transistor array substrate. The thin film transistor of the disclosure prevents the threshold voltage thereof from being drifted in a case of negative bias illumination stress (NBIS). |
| 主权项 |
1. A thin film transistor array substrate, comprising:
a bottom gate of a thin film transistor, disposed on a substrate; a bottom gate insulating layer, disposed on the substrate and covering the bottom gate; a semiconductor oxide layer, disposed on the bottom gate insulating layer; an etch blocking layer, disposed on the bottom gate insulating layer and covering the semiconductor oxide layer, wherein the etch blocking layer comprises a first via, a portion of the semiconductor oxide layer is exposed through the first via; a drain and a source of the thin film transistor, disposed on the etch blocking layer, the drain contacting with the semiconductor oxide layer through the first via; an insulating protection layer, disposed on the etch blocking layer and covering the drain and source; a second via, arranged in the insulating protection layer, the etch blocking layer and the bottom gate insulating layer, a portion of the bottom gate being exposed through the second via; and a top gate, disposed on the insulating protection layer and the top gate contacting with the bottom gate through the second via. |
