发明名称 SENDING PACKETS USING OPTIMIZED PIO WRITE SEQUENCES WITHOUT SFENCES
摘要 Method and apparatus for sending packets using optimized PIO write sequences without sfences. Sequences of Programmed Input/Output (PIO) write instructions to write packet data to a PIO send memory are received at a processor supporting out of order execution. The PIO write instructions are received in an original order and executed out of order, with each PIO write instruction writing a store unit of data to a store buffer or a store block of data to the store buffer. Logic is provided for the store buffer to detect when store blocks are filled, resulting in the data in those store blocks being drained via PCIe posted writes that are written to send blocks in the PIO send memory at addresses defined by the PIO write instructions. Logic is employed for detecting the fill size of packets and when a packet's send blocks have been filled, enabling the packet data to be eligible for egress.
申请公布号 US2017017465(A1) 申请公布日期 2017.01.19
申请号 US201615277527 申请日期 2016.09.27
申请人 lntel Corporation 发明人 Debbage Mark;Mutha Yatin M.
分类号 G06F5/06;G06F13/42;G06F5/14;G06F13/28 主分类号 G06F5/06
代理机构 代理人
主权项 1. An apparatus, comprising: a PCIe (Peripheral Component Interconnect Express) interface; a transmit engine including, a Programmed Input/Output (PIO) send memory operatively coupled the PCIe interface; andan egress block, operatively coupled to the PIO send memory; and a network port including a transmit port operatively coupled to the egress block, wherein the transmit engine further comprises circuitry and logic to, partition the PIO send memory into a plurality of send contexts, each comprising a plurality of sequential send blocks;receive inbound PCIe posted writes from a processor coupled to the PCIe interface via a PCIe interconnect, each PCIe posted write containing packet data corresponding to a packet stored in memory coupled to the processor and being written to a single send block via a PIO write instruction, wherein packet data for a given packet is written to one send block or a plurality of sequential send blocks, wherein packet data for a packet to be written to a plurality sequential send blocks is enabled to be received out of order;detect when a plurality of sequential send blocks for a packet have been filled; andmark packet data in the plurality of sequential send blocks as eligible for egress to the egress block when all of the sequential send blocks for a packet are detected as being filled.
地址 Santa Clara CA US