发明名称 |
COMMUNICATION BETWEEN INTEGRATED GRAPHICS PROCESSING UNITS |
摘要 |
The communication between integrated graphics processing units (CPUs) is disclosed. A first integrated GPU of a first computing device obtains a tuple pertaining to data to be transmitted to a second integrated CPU of a second computing device. The tuple comprises at least a length of the data. The first integrated GPU allocates a virtual address space to the data based on the length of the data, where the virtual address space has a plurality of virtual addresses. Further, a mapping table of a mapping between the plurality of virtual addresses and a plurality of bus addresses is provided by the first integrated GPU to a communication module of the first computing device to transmit the data, where the plurality of bus addresses indicate physical locations of the data. |
申请公布号 |
US2017018050(A1) |
申请公布日期 |
2017.01.19 |
申请号 |
US201415121217 |
申请日期 |
2014.02.27 |
申请人 |
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP |
发明人 |
Roy Indrajit;Kim Sangman;Talwar Vanish |
分类号 |
G06T1/20;G06F15/167;G06T1/60;G06F12/1009;G06F12/1036;G06F9/50;G06F12/04 |
主分类号 |
G06T1/20 |
代理机构 |
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代理人 |
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主权项 |
1. A method for communication between integrated graphics processing units (GPUs), the method comprising:
obtaining, by a first integrated GPU of a first computing device, a tuple pertaining to data to be transmitted to a second integrated GPU of a second computing device, wherein the tuple comprises at least a length of the data; allocating, by the first integrated GPU, a virtual address space to the data based on the length of the data, wherein the virtual address space comprises a plurality of virtual addresses; and providing, by the first integrated GPU, a mapping table comprising a mapping between the plurality of virtual addresses and a plurality of bus addresses to a communication module of the first computing device to transmit the data to the second integrated GPU, wherein the plurality of bus addresses indicate physical locations of the data. |
地址 |
Houston TX US |