| 发明名称 |
NONVOLATILE MEMORY INTERFACE FOR METADATA SHADOWING |
| 摘要 |
A memory includes multiple non-volatile memory devices, each having multiple nonvolatile memory cells. A write controller is configured to stream bits to the memory devices using a write data channel that optimizes a speed of writing to the memory devices to provide writes at a first speed. A read controller is configured to read bits from the memory devices, at a second speed slower than the first speed, using a read channel. A bi-directional bus that both the write controller and the self-referenced read controller share to access the plurality of non-volatile memory devices. |
| 申请公布号 |
US2017017396(A1) |
申请公布日期 |
2017.01.19 |
| 申请号 |
US201615272933 |
申请日期 |
2016.09.22 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
DEBROSSE JOHN K.;FITCH BLAKE G.;FRANCESCHINI MICHELE M.;TAKKEN TODD E.;WORLEDGE DANIEL C. |
| 分类号 |
G06F3/06;G11C13/00;G11C11/16 |
主分类号 |
G06F3/06 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A memory, comprising:
a plurality of non-volatile memory devices, each comprising a plurality of nonvolatile memory cells; a write controller configured to stream bits to the memory devices using a write data channel that optimizes a speed of writing to the memory devices to provide writes at a first speed; a read controller configured to read bits from the memory devices, at a second speed slower than the first speed, using a read channel; and a bi-directional bus that both the write controller and the self-referenced read controller share to access the plurality of non-volatile memory devices. |
| 地址 |
Armonk NY US |
