发明名称 LOW RESISTANCE BITLINE AND SOURCELINE APPARATUS FOR IMPROVING READ AND WRITE OPERATIONS OF A NONVOLATILE MEMORY
摘要 Described is an apparatus for improving read and write margins. The apparatus comprises: a sourceline; a first bitline; a column of resistive memory cells, each resistive memory cell of the column coupled at one end to the sourceline and coupled to the first bitline at another end; and a second bitline in parallel to the first bitline, the second bitline to decouple read and write operations on the bitline for the resistive memory cell. Described is also an apparatus which comprises: a sourceline; a bitline; a column of resistive memory cells, each resistive memory cell in the column coupled at one end to the sourceline and coupled to the bitline at another end; and sourceline write drivers coupled to the bitline and the sourceline, wherein the sourceline write drivers are distributed along the column of resistive memory cells.
申请公布号 US2017018298(A1) 申请公布日期 2017.01.19
申请号 US201615280935 申请日期 2016.09.29
申请人 Intel Corporation 发明人 Dray Cyrille;Lin Blake C.;Hamzaoglu Fatih;Wei Liqiong;Wang Yih
分类号 G11C11/16;G06F3/06 主分类号 G11C11/16
代理机构 代理人
主权项 1. An apparatus to provide read and write operations, comprising: a sourceline; a bitline; a column of resistive memory cells, each resistive memory cell in the column coupled at one end to the sourceline and coupled to the bitline at another end; and bitline write drivers coupled to the bitline and the sourceline, wherein the bitline write drivers are distributed along the column of resistive memory cells.
地址 Santa Clara CA US