| 发明名称 |
SPI Interface With Less-Than-8-Bit Bytes And Variable Packet Size |
| 摘要 |
A synchronous serial peripheral device has a transmission unit coupled with a data output line and a clock unit coupled with a clock line. The serial peripheral device transmits a minimum of a single transmission, wherein in a first operating mode the transmission unit and the clock unit are configurable to perform a data transmission with a data length that can be defined to be between one (1) and eight (8) bit. |
| 申请公布号 |
US2017017584(A1) |
申请公布日期 |
2017.01.19 |
| 申请号 |
US201615209467 |
申请日期 |
2016.07.13 |
| 申请人 |
Microchip Technology Incorporated |
发明人 |
Kilzer Kevin;Ramanathan Shyamsunder;Rajaraman Sai Karthik;Milks Justin |
| 分类号 |
G06F13/10;G06F13/40;G06F13/42;G06F13/16 |
主分类号 |
G06F13/10 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A synchronous serial peripheral device comprising: a transmission unit coupled with a data output line and a clock unit coupled with a clock line, wherein the serial peripheral device transmits a minimum of a single transmission, wherein in a first operating mode the transmission unit and the clock unit are configurable to perform a data transmission with a data length that can be defined to be between one (1) and eight (8) bit. |
| 地址 |
Chandler AZ US |
