发明名称 |
Method For Enlarging Data Memory In An Existing Microprocessor Architecture With Limited Memory Addressing |
摘要 |
A method for expanding a data memory for a microprocessor architecture which uses a bank select accessing scheme for accessing data memory which is divided into a plurality of memory banks. A bank select register is configured to select a memory bank and the microprocessor architecture has an instruction set with a dedicated instruction for selecting a memory bank. An opcode of the dedicated bank select instruction provides for a maximum of n bits payload thereby providing for an address value which is configured to select a maximum of 2n memory banks. The method has the steps of: using an opcode of a test instruction that provides for m bits of payload for a new bank select instruction, wherein m>n; and using an opcode of the dedicated bank select instruction for a new test instruction. |
申请公布号 |
US2017017431(A1) |
申请公布日期 |
2017.01.19 |
申请号 |
US201615209543 |
申请日期 |
2016.07.13 |
申请人 |
Microchip Technology Incorporated |
发明人 |
Kilzer Kevin;Julicher Joseph;Van Eeden Jacobus Albertus |
分类号 |
G06F3/06;G06F9/30 |
主分类号 |
G06F3/06 |
代理机构 |
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代理人 |
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主权项 |
1. A method for expanding a data memory for a microprocessor architecture comprising a bank select accessing scheme for accessing data memory which is divided into a plurality of memory banks and a bank select register configured to select a memory bank and wherein the microprocessor architecture comprises an instruction set having a dedicated instruction for selecting a memory bank; wherein an opcode of the dedicated bank select instruction provides for a maximum of n bits payload thereby providing for an address value which is configured to select a maximum of 2n memory banks, the method comprising the steps of:
using an opcode of a test instruction that provides for m bits of payload for a new bank select instruction, wherein m>n; and using an opcode of the dedicated bank select instruction for a new test instruction. |
地址 |
Chandler AZ US |