High bandwidth symmetrical storage controller

摘要

Provided herein are systems, apparatuses and methods (i.e., utilities) that allow for increasing the bandwidth of a processing complex of a storage controller. The utilities utilize a symmetrical approach where PCIe switches overcome limitations of prior art processor complexes. The symmetrical approach provided by the disclosed utilities as incorporated into a storage controller provides equal access from any host path/channel to any drive path/channel (i.e., storage element). More specifically, a first or a first set of PCIe switches connect front-end PCIe host bus adaptors, which are connectable to host systems, to front-end data paths of a plurality of PCIe memory controllers. A second or second set of PCIe switches connect backend host bus adapters, which are connectable to storage elements, to back-end data paths of the plurality of PCIe memory controllers. The symmetrical architecture provides at least twice the bandwidth of prior art architectures.

主权项

1. A storage controller, comprising:
four PCIe memory controllers, each having a PCIe front-end path, a PCIe back-end path and a set of memory modules; a PCIe crossover switch having:
a front-end PCIe switch having a first plurality of PCIe lanes connected to one or more front-end PCIe host bus adaptors, said front-end host bus adaptors being connectable to one or more host paths, and a second plurality of PCIe lanes connected each of said PCIe front-end paths of said four PCIe memory controllers; anda back-end PCIe switch having a first plurality of PCIE lanes connected to one or more back-end PCIe host bus adaptors, said back-end host bus adaptors being connectable to one or more drive paths, and a second plurality PCIe lanes connected to each of said PCIe back-end paths of said four PCIe memory controllers.