Integrated circuit stack including a patterned array of electrically conductive pillars

摘要

The present disclosure describes a stacked integrated circuit system that includes two integrated circuit layers stacked on opposite sides of an interposer layer. The interposer layer may include at least one integrated circuit die and an interposer portion that includes a plurality of electrically conductive pillars arranged in a laterally patterned array within the interposer layer.

主权项

1. A system comprising:
a first integrated circuit layer comprising a first plurality of interconnect elements; a second integrated circuit layer comprising a second plurality of interconnect elements; and an interposer layer between the first and second integrated circuit layers, wherein the first and second integrated circuit layers and the interposer layer are stacked in a z-axis direction, and wherein the interposer layer comprises:
an interposer portion comprising a filler material and a plurality of electrically conductive pillars extending in the z-axis direction, wherein the plurality of electrically conductive pillars form a patterned array in an x-y plane substantially normal to the z-axis direction, wherein each electrically conductive pillar of the plurality of electrically conductive pillars is substantially encircled in the x-y plane by the filler material, wherein at least one electrically conductive pillar of the plurality of electrically conductive pillars is configured to electrically communicate with at least one interconnect element of the first plurality of interconnect elements and at least one interconnect element of the second plurality of interconnect elements;a first integrated circuit die adjacent to the interposer portion and between the first and second integrated circuit layers; andat least one electrical loop forming an electrical pathway that encircles the first integrated circuit die within the x-y plane of the interposer portion.