Shallow trench isolation structure with sigma cavity

摘要

Embodiments of the present invention provide an improved shallow trench isolation structure and method of fabrication. The shallow trench isolation cavity includes an upper region having a sigma cavity shape, and a lower region having a substantially rectangular cross-section. The lower region is filled with a first material having good gap fill properties. The sigma cavity is filled with a second material having good stress-inducing properties. In some embodiments, source/drain stressor cavities may be eliminated, with the stress provided by the shallow trench isolation structure. In other embodiments, the stress from the shallow trench isolation structure may be used to complement or counteract stress from a source/drain stressor region of an adjacent transistor. This enables precise tuning of channel stress to achieve a desired carrier mobility for a transistor.

主权项

1. A semiconductor structure, comprising:
a semiconductor substrate; a cavity formed in the semiconductor substrate, the cavity comprising a sigma cavity in an upper region, and a lower region, wherein the lower region comprises a substantially rectangular cavity; a first dielectric layer disposed in the lower region; a second dielectric layer disposed in the upper region, wherein the second dielectric layer is planar with a top surface of the semiconductor substrate; a third dielectric layer disposed below the first dielectric layer; and at least one additional dielectric layer disposed below the third dielectric layer.