Methods of fabricating an F-RAM

摘要

Non-volatile memory cells including complimentary metal-oxide-semiconductor transistors and embedded ferroelectric capacitor and methods of forming the same are described. In one embodiment, the method includes forming on a surface of a substrate a gate level including a gate stack of a MOS transistor, a first dielectric layer overlying the MOS transistor and a first contact extending through the first dielectric layer from a top surface thereof to a diffusion region of the MOS transistor. A local interconnect (LI) layer is deposited over the top surface of the first dielectric layer and the first contact, a ferro stack including a bottom electrode, a top electrode and ferroelectric layer there between deposited over the LI layer, and the ferro stack and the LI layer patterned to form a ferroelectric capacitor and a LI through which the bottom electrode is electrically coupled to the diffusion region of the MOS transistor.

主权项

1. A method comprising:
forming a gate level on a surface of a substrate, the gate level including a gate stack of a metal-oxide-semiconductor (MOS) transistor, a first dielectric layer overlying the MOS transistor and a first contact extending through the first dielectric layer from a top surface thereof to a diffusion region of the MOS transistor in the substrate; depositing a local interconnect (LI) layer over the top surface of the first dielectric layer and the first contact, the LI layer comprising aluminum titanium nitride (AlTiN); depositing an iridium layer on the LI layer; depositing directly on the iridium layer a ferroelectric layer and a top electrode layer; patterning the top electrode layer, the ferroelectric layer and the iridium layer, stopping on the LI layer to form a ferro stack; patterning the LI layer to concurrently form a ferroelectric capacitor comprising the ferro stack and a bottom electrode comprising the patterned iridium layer and a portion of the LI layer through which the bottom electrode is electrically coupled to the diffusion region of the MOS transistor, and a LI comprising an exposed portion of the LI layer not covered by the ferro stack; and concurrently encapsulating the ferroelectric capacitor and the LI with an encapsulation layer, wherein encapsulating the LI comprises depositing the encapsulation layer directly on a top surface and sidewalls of LI.