Instructions to mark beginning and end of non transactional code region requiring write back to persistent storage

摘要

A processor in described having an interface to non-volatile random access memory and logic circuitry. The logic circuitry is to identify cache lines modified by a transaction which views the non-volatile random access memory as the transaction's persistence storage. The logic circuitry is also to identify cache lines modified by a software process other than a transaction that also views said non-volatile random access memory as persistence storage.

主权项

1. A processor comprising:
an interface to non-volatile random access memory; and logic circuitry to:
detect either of a start of a non-transactional operation to write to the non-volatile random access memory and a start of a transactional operation to enable a same specialized hardware that tracks a cache line change,on detection of the start of the non-transactional operation, track, with the same specialized hardware that tracks the cache line change, a cache line written in the non-volatile random access memory for a modification by the non-transactional operation and write back a modified cache line to the non-volatile random access memory on detection of an end of the non-transactional operation, andon detection of the start of the transactional operation, track, with the same specialized hardware that tracks the cache line change, a cache line written in the transactional operation and perform either of a commit and a roll back on detection of an end of the transactional operation.