SEMICONDUCTOR DEVICE HAVING PDA FUNCTION

摘要

A method for writing a mode register in a semiconductor device, the method includes receiving a mode register command and a mode signal; generating a first mode register setting signal; delaying the first mode register setting signal in a first latency shifter to provide a second mode register setting signal; receiving a data signal in synchronization with the second mode register setting signal; and writing the mode signal to the mode register only if the received data signal has a first logic level.

主权项

1. A method for controlling a plurality of memory devices comprising:
supplying a mode register command and a mode signal in common to the plurality of memory devices; supplying a first enable signal having a first logic level to a first memory device of the plurality of memory devices, the first enable signal being supplied with a predetermined latency after supplying the mode register command and the mode signal; and supplying a second enable signal having a second logic level to a second memory device of the plurality of memory devices, the second signal being supplied with the predetermined latency after supplying the mode register command and the mode signal; wherein the mode register command is decoded and delayed by a latency shifter in each of the plurality of memory devices, the mode signal is written to a first mode register of the first memory device, and the mode signal is not written to a first mode register of the second memory device.