发明名称 SUCCESSIVE APPROXIMATION SIGMA DELTA ANALOG-TO-DIGITAL CONVERTERS
摘要 An A/D converter including first and second A/D converters and a recombination module. The first A/D converter receives an analog input signal, converts the analog input signal to a first digital signal, and includes a successive approximation module, which performs a successive approximation to generate the first digital signal. The second A/D converter converts an analog output of the first A/D converter to a second digital signal. The analog output of the first A/D converter is generated based on the analog input signal. The second A/D converter is a fine conversion A/D converter relative to the first A/D converter. The second A/D converter performs the delta-sigma conversion process and includes a decimation filter that suppresses noise which reduces amplification and power consumption requirements of the first A/D converter and performs a delta-sigma decimation process to generate the second digital signal based on the analog output of the first A/D converter.
申请公布号 US2017012637(A1) 申请公布日期 2017.01.12
申请号 US201615210051 申请日期 2016.07.14
申请人 MARVELL WORLD TRADE LTD. 发明人 VENCA ALESSANDRO;NANI CLAUDIO;GHITTORI NICOLA;BOSI ALESSANDRO
分类号 H03M1/38;H03M3/00;H03M1/08 主分类号 H03M1/38
代理机构 代理人
主权项 1. An analog-to-digital converter comprising: a first analog-to-digital converter configured to receive an analog input signal and convert the analog input signal to a first digital signal, the first analog-to-digital converter comprising a successive approximation module, wherein the successive approximation module is configured to perform a successive approximation to generate the first digital signal; a second analog-to-digital converter configured to convert an analog output of the first-analog-to-digital converter to a second digital signal, wherein the analog output of the first analog-to-digital converter is generated based on the analog input signal, wherein the second analog-to-digital converter is a fine conversion analog-to-digital converter relative to the first analog-to-digital converter, wherein the second analog-to-digital converter performs the delta-sigma conversion process and comprises a decimation filter, and wherein the decimation filter is configured to suppress noise which reduces amplification and power consumption requirements of the first analog-to-digital converter, andperform a delta-sigma decimation process to generate the second digital signal based on the analog output of the first analog-to-digital converter; and a combination module configured to combine the first digital signal and the second digital signal to provide a resultant output signal.
地址 ST. MICHAEL BB