发明名称 |
POWER-ON RESET CIRCUIT AND UNDER-VOLTAGE LOCKOUT CIRCUIT COMPRISING THE SAME |
摘要 |
An UVLO circuit according to an aspect of the present invention includes: a power-on reset (POR) circuit generating an output based on a first current that flows according to an increase of a power supply voltage and not operating in a normal state of the power supply voltage; and a logic operation unit generating a reset signal according to an output of the POR circuit and an output based on a result of comparison between a sense voltage that corresponds to the power supply voltage and a predetermined reference voltage. |
申请公布号 |
US2017012619(A1) |
申请公布日期 |
2017.01.12 |
申请号 |
US201615204138 |
申请日期 |
2016.07.07 |
申请人 |
Fairchild Korea Semiconductor, LTD |
发明人 |
SONG Kinam;OH Wonhi;CHOI Jinkyu;JIN Bumseung;SHIN Samuell |
分类号 |
H03K17/22 |
主分类号 |
H03K17/22 |
代理机构 |
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代理人 |
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主权项 |
1. A power-on reset (POR) circuit comprising:
a capacitor in which a first current flows according to an increase of a power supply voltage; a current mirror configured to mirror the first current to a second current; and a transistor configured to be operated by the second current, wherein the power supply voltage reaches a normal reference voltage, and the POR circuit blocks mirroring of the current mirror and turns off the transistor. |
地址 |
Bucheon-si KR |