MEMORY SYSTEM

摘要

A control circuit of a memory device feeds a first clock received from a transmission control circuit of a host device back to a reception control circuit of the host device as a second clock. The reception control circuit controls data reception from the memory device in synchronization with the fed-back second clock.

主权项

1. A memory system comprising:
a host device; and a memory device configured to be connected to the host device, wherein the host device includes:
a transmission control circuit configured to control command transmission to the memory device in synchronization with a first clock, anda reception control circuit configured to control data reception from the memory device in synchronization with a second clock, wherein the memory device includes:
a memory array configured to store data, anda control circuit configured to control an access to the memory array, wherein the transmission control circuit is configured to transmit the first clock to the control circuit, and wherein the control circuit is configured to transmit the first clock received from the transmission control circuit to the reception control circuit as the second clock.