HYBRID CHARGE-SHARING CHARGE-REDISTRIBUTION DAC FOR SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTERS

摘要

A hybrid D/A converter is provided including first and second D/A converters. The first D/A converter receives a digital signal having an input voltage and converts a first most-significant-bit of the digital signal to be converted to an analog signal. The first D/A converter includes first capacitors, which are charged by the input voltage and reference voltages during a sampling phase of the digital signal. Charges of the first capacitors are shared during successive approximations of first bits of the digital input signal received by the hybrid D/A converter. The second D/A converter converts a first least-significant-bit of the digital input signal. The second D/A converter includes second capacitors, which are charged based on a common mode voltage during the sampling phase. The second D/A converter performs charge redistribution by connecting the second capacitors to receive the reference voltages during successive approximations of second bits of the digital signal.

主权项

1. A hybrid digital-to-analog converter comprising:
a first digital-to-analog converter configured to (i) receive a digital input signal having an input voltage, and (ii) convert a first most-significant-bit of a plurality of bits of the digital input signal to be converted to an analog signal, wherein the first digital-to-analog converter comprises a first plurality of capacitors, wherein the first plurality of capacitors are charged by the input voltage and reference voltages during a sampling phase of the digital input signal, and wherein charges of the first plurality of capacitors are shared during successive approximations of a first one or more bits of the digital input signal received by the hybrid digital-to-analog converter to provide the analog signal; and a second digital-to-analog converter configured to convert a first least-significant-bit of the plurality of bits of the digital input signal to be converted to the analog signal, wherein the second digital-to-analog converter comprises a second plurality of capacitors, wherein the second plurality of capacitors are charged based on a common mode voltage during the sampling phase of the digital input signal, and wherein the second digital-to-analog converter is configured to perform charge redistribution by connecting the second plurality of capacitors to receive the reference voltages during successive approximations of a second one or more bits of the digital input signal.