发明名称 SELF-ALIGNED BARRIER AND CAPPING LAYERS FOR INTERCONNECTS
摘要 An interconnect structure for integrated circuits for copper wires in integrated circuits and methods for making the same are provided. Mn, Cr, or V containing layer forms a barrier against copper diffusing out of the wires, thereby protecting the insulator from premature breakdown, and protecting transistors from degradation by copper. The Mn, Cr, or V containing layer also promotes strong adhesion between copper and insulators, thus preserving the mechanical integrity of the devices during manufacture and use, as well as protecting against failure by electromigration of the copper during use of the devices and protecting the copper from corrosion by oxygen or water from its surroundings. In forming such integrated circuits, certain embodiments of the invention provide methods to selectively deposit Mn, Cr, V, or Co on the copper surfaces while reducing or even preventing deposition of Mn, Cr, V, or Co on insulator surfaces. Catalytic deposition of copper using a Mn, Cr, or V containing precursor and an iodine or bromine containing precursor is also provided.
申请公布号 US2017012001(A1) 申请公布日期 2017.01.12
申请号 US201615207198 申请日期 2016.07.11
申请人 President and Fellows of Harvard College 发明人 GORDON Roy Gerald;BHANDARI Harish B.;AU Yeung;LIN Youbo
分类号 H01L23/532;H01L21/285;H01L23/522;H01L21/288;H01L21/768;H01L23/528 主分类号 H01L23/532
代理机构 代理人
主权项 1. A process for forming an integrated circuit interconnect structure, said process comprising: a) providing a partially-completed interconnect structure having one or more vias and trenches, said vias and trenches comprising sidewalls defined by one or more electrically insulating materials and electrically conductive copper-containing bottom regions; b) depositing a layer comprising a nitride of a metal selected from the group consisting of manganese, chromium and vanadium on the partially-completed interconnect structure; c) depositing copper within said one or more vias and trenches.
地址 Cambridge MA US