| 摘要 |
Compact Single Photon Avalanche Diode (SPAD) array structures are described. In one embodiment, an on board common trigger circuit is used for two or more SPAD structures. The common trigger comprises a compact counter, such as a 16 bit counter, and flash memory constructed adjacent two or more SPAD structures. Triggering of a SPAD latches the value of the counter and the value is stored in the memory along with the ID of the triggering SPAD. The counter continues counting, and if another SPAD subsequently triggers, the counter is again latched and the value is stored in the memory along with the ID of the subsequently triggering SPAD. The memory can then be read and the triggering circuit reset. Additionally methods for designing compact SPAD structures, a compact active quenching circuit and a compact 16 bit counter are described that were used to construct a 128x256 dual SPAD array, and which can be used to create even higher density SPAD arrays. |
